Autorouters can be terrible. They mainly are. The reasons are partially with optimisation algorithms (although these are getting better), but primarily with poorly defined constraints.
Currently a schematic holds the physical connections and maybe a little bit of extra data - some pins might be "power" pins, or maybe a net or two is defined as a high current net - but broadly the circuit metadata which is highly relevant for routing is held in the designers head.
When you lay out a board you're always thinking about high current and high frequency (and especially high current high frequency) paths. You're looking for paths to ground, you're isolating sensitive analog regions from noisy digital regions, you're making sure the ground plane is uninterrupted. You're basically making thousands of tiny tradeoffs based on an understanding of what the board should be doing. If a computer doesn't have that knowledge, of course it can't effectively lay out a board.
If we can improve schematic annotation and part representation to properly hold this information then there's absolutely no reason autorouters can't be better than manual layout. If we can combine it with simulation then autorouting should really be the only logical choice. If you can almost completely avoid EMC testing by carefully defining all the high frequency nets and letting the autorouter find a design which is optimised for RF performance, then why wouldn't you? An EMC chamber costs thousands of dollars a day - you can easily spend 10s of thousands just on the testing alone, not to mention redesign costs.
