I made a simplified MIPS (no FPU, 4-stages pipeline with a basic interrupt controller and nothing out of order or the like) in VHDL for a uni course. We had some simpler exercises before that (e.g., PS2 keyboard controller) and with that I found it quite OK.

One just needs to avoid falling for the similarities with programming too much, and rather think in terms of signal and have the clock in mind.

The worst things are the tooling, e.g., I expected Quartus to crash or hang at any moment, I early wrote a TCL script to setup the project and FPGA pin mapping to be able to scratch the Quartus project at any time and just recreate it in seconds without losing any work (or my mind).

There's ghdl (open source) which I found quite nice, but that's only for virtual development and (at least then) had no support for getting out a bitstream to load onto a real FPGA, so often I used it for test benches and some quicker development tries before actually loading it onto the FPGA every so often.

I find VHDL unpleasant (and Verilog only slightly less so, even if it's the worse language) but the hard part for someone with a programming background isn't the language per se, it's learning how to design digital logic, which is very different from writing software.