So for those scenarios, I haven't heard of code-size problem argument against RISC-V.
Who knows? Maybe an extension addresses this and becomes dominant.
It's just more wordy per result than it could be, and it seems a poor choice given all the other pretty great ones made.
You, apparently, really really care about arbitrary-precision adds.
RISC-V is a general purpose ISA. It can do any computing task, just perhaps not optimally.
How non-optimal is it for arbitrary-precision adds? Or, more importantly, for the overall application that is a part of. No one who has raised this as a concern has shown any actual numbers. In fact they don't even show the actual loop doing the arbitrary-precision add, with loop control instructions, loads and stores. All they show is that a single "add-with-carry" instruction in some other ISAs translates to several instructions in RISC-V.
The problem, if any, in your application area can be solved by adding a single custom instruction to the ISA.
That doesn't sound like something fundamentally wrong with the ISA. Especially when that ISA is designed from the start to be extensible by users via adding custom instructions.
