> are any companies other than Nvidia embarking up AI/ML chipmaking in a closed fashion?

https://www.cadence.com/en_US/home/solutions/machine-learnin...

https://www.synopsys.com/implementation-and-signoff/ml-ai-de...

https://www.plm.automation.siemens.com/global/en/our-story/n...

I think you'll be hard pressed to find any company using open source tools to design a business-critical chip for a foundry that gives any information without an NDA.

AFAIK Google doesn't have a open-source ASIC design for OpenTitan, and WD doesn't have an open-source ASIC design for SweRV.

there are a lot of interesting initiatives, but in the semiconductor industry open source tooling and processes are only a tiny niche that a few companies are playing around with.

> The chip design itself should be the secret sauce. Not the tools you make the chip with.

The secret sauce is generally whatever gives one a competitive advantage. Businesses typically open things up when the want to reduce the cost of something and/or cause pain for someone else (i.e. killing their cash cow), not because they're benevolent and want to share.

> I challenge you to answer your own question in reverse: are any companies other than Nvidia embarking up AI/ML chipmaking in a closed fashion? There probably are, let's follow & watch them.

Isn't Google's floorplanning work closed source? https://ai.googleblog.com/2020/04/chip-design-with-deep-rein...

So intel, TSMC and Samsung have open-sourced their chip manufacturing systems I did not know that. ASML is giving out lithography systems so anyone can make them.

> The chip design itself should be the secret sauce. Not the tools you make the chip with.

I’m sure Cadence, Synopsys, and Mentor would love to hear more about this.

"The NVIDIA Deep Learning Accelerator (NVDLA) is a free and open architecture that promotes a standard way to design deep learning inference accelerators. With its modular architecture, NVDLA is scalable, highly configurable, and designed to simplify integration and portability. The hardware supports a wide range of IoT devices. Delivered as an open source project under the NVIDIA Open NVDLA License, all of the software, hardware, and documentation will be available on GitHub. Contributions are welcome." http://nvdla.org/

> The chip design itself should be the secret sauce.

The chip comes from the chip design, and the chip design is made with tools. None can exist alone.

> Many other companies are starting to get onboard with open chip design.

> There are plenty of company's releasing the chips too. Google's OpenTitan[2] security chip. WD's Swerv RISC-V core for their driver controller ARM R-series replacement[3].

These chips aren't the foundation of Google or WD's revenue stream. You won't see them significantly affecting a line item in their quarterly reports.

> are any companies other than Nvidia embarking up AI/ML chipmaking in a closed fashion?

Nvidia is in a unique position where the foundation of their profits (chips) happens to be what makes practical AI possible. They're literally running the vast majority of the show. If something falls into the "foundation of existence" circle in their Venn diagram of concerns, they're going to be less open about it. Improving the ability to design chips is at the exact center of that "foundation of existence" circle.

Designing a modern ASIC requires experts across the whole spectrum, from top level architects who increase performance and reduce power from first principles, to RTL designers who have a feel for what kind of code will result in less area or less toggling wires, to standard cell designers who optimize a cell library for an optimal speed vs power vs area trade-off, to floor planning for the area density and speed while not running into IR drop and congestion issues, to DFT to make sure testing is as fast as possible with a high coverage, to DFM engineers who come up with strategies for optimal yield.

All these aspects are part of the chip design, and being bad at one can significantly compromise the competitiveness of the final piece of silicon.

So this statement is hopelessly naive and ignorant:

> The chip design itself should be the secret sauce. Not the tools you make the chip with.

Because all the steps that I listed above are done with tools. And in many cases, having better tools is the secret sauce that makes your design better than the competition.

The article mentions a runtime of minutes instead of a day to do IR drop checking: that's the kind of acceleration that allows trying out multiple configurations for an optimal solution instead of settling for good enough. A lower amount of IR drop allows for a more aggressive, less conservative power curve. End result: a chip that can be clocked at a higher speed without needing to increase the voltage. A major competitive advantage.

> are any companies other than Nvidia embarking up AI/ML chipmaking in a closed fashion?

Of course there are. AI can be used for almost anything where large amount of data is already available, and where there's a clear cost function that must be optimized. AI is a natural for many steps in the ASIC design flow. You could have figured this out by yourself: Nvidia is talking about it. If it were such a big novelty, they'd keep it under wraps.

> WD's Swerv RISC-V core for their driver controller ARM R-series replacement [snip snip] everyone but NVidia playing well together, trying for better, standardizing a future for participation & healthy competition & growth.

Let's talk Swerv: a piece of IP that's definitely useful to Western Digital. Useful to general world too. But not something that scores particularly high on the list of the secret sauce ingredients that makes or breaks their products. Does Nvidia have similar open source IP offerings? Yes, they do! Check out NvDLA: Nvidia's open source DL accelerator. Your day must be a whole lot better now, knowing that, just like WD, Nvidia also open sources some non-critical IP.

I'm sure that you're aware that AMD uses a neural network in their CPU branch predictor. Do you think that AMD should release the tool that was used to figure out the optimal weights? After all, the tool itself is not part of the actual CPU design...

If the tools to make it would more easily allow others to achieve similarly efficient designs, then that is the secret sauce...

They are getting onboard with open chip design, because they need to get onboard with open chip design, and borrow to even be competitive and survive. You only get to use the black rocket when you're not in the lead.