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0 pointssnvzz3y ago0 comments

>I am also under no delusions that RISC-V would be better at this.

RISC-V is already way better at this.

e.g.:

The early boot process (SBI) was standardized years ago, and widely deployed in current hardware.

Late boot process (UEFI on RISC-V) was standarized early this year, ahead of relevant hardware (servers, laptops, workstations).

ISA Profiles standard 2022 is in public review right now, and will likely be effective before the year ends. Hardware where this is relevant (e.g. SoC used in VisionFive2) already released this year is already compliant with the draft.

Future hardware will be widely compliant. Linux distributions and other operating systems target these profiles.

Relative to the utter chaos ARM has when it comes to these important topics, RISC-V is way ahead, being well prepared before the hardware floods the world.

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Conan_Kudo3y ago

> The early boot process (SBI) was standardized years ago, and widely deployed in current hardware.

> Late boot process (UEFI on RISC-V) was standarized early this year, ahead of relevant hardware (servers, laptops, workstations).

UEFI was standardized for ARM many years before hardware arrived. It didn't matter. It was widely ignored.

As long as we have to use U-Boot and use DTs provided by the OS instead, we're going to be in the same mess that ARM is in. The key is that UEFI needs to be so cheap to integrate by default that nobody can use the excuse of "low end" to avoid UEFI. I have a feeling that's not what's happening in RISC-V.

> ISA Profiles standard 2022 is in public review right now, and will likely be effective before the year ends.

The ability to chop up the ISA is going to have ugly side-effects for development and support of RISC-V. Various ISA profiles and modes already result in different psABIs, which flips the idea from an extensible ISA to a fragmented one.

Vt71fcAqt73y ago

>The ability to chop up the ISA is going to have ugly side-effects

The instruction set is already reduced (hense RISC) to the bare minimum for the two important profiles: microcontrolers and linux machines. Microcontrollers will be 32-bit and will nessesarliy have a different tool-chain from 64 bit computers as they won't be running Linux. The only question is will most Linux machines use vector. That is probably a yes. X-86 and ARM are allready fragmented and the software ecosystem survived. Nobody is adding custom instruction to a reduced instuction set just for the sake of it. Also, as RISC-V machines will only run on Linux for at least the next few years, all the software and compilers are open already. So there is no way for a single vendor to lock in the ecosystem.

snvzzOP3y ago

>The only question is will most Linux machines use vector. That is probably a yes.

And, while RVA22 does not require vector, the next profile, whenever that happens, is.

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