Unfortunately, the open source tools are also decades behind. They're really only practical for small designs on the couple of open source PDKs that exist (and those seem more like abandoned PR projects than serious commitments to open hardware design).
Related, I thought this post was actually this video, which is tongue in cheek but a pretty good explanation of silicon manufacturing nonetheless: https://youtu.be/vuvckBQ1bME
Been doing IC design professionally since 2010. Happy to answer any questions.
That said, despite what some ASIC houses will tell you, I haven't seen the costs narrowing on commercial ASIC design to the point that realizing an SoC would be a substantial cost savings on an aggressively cost-optimized microcontroller-based design or IoT design. Being able to do a commercially viable small-to-medium-sized ASIC for a design that ships, say, less than 2M/year, would change a lot of things. It would be very interesting if that were the case in 5-10 years - what do you see from the IC design perspective?
Agreed. Custom design is still prohibitively expensive, and most often not needed. That being said, older process nodes are getting cheaper to the point where the manufacturing cost is feasible. The problem remains EDA tooling, which may very well be the majority of the cost. Without more competition in that space, I don't see Cadence/Synopsys/Siemens bringing their prices down any time soon.
What cheap FPGA would you recommend to drive two 2k screens, implement Gbps LiFi transceiver and some basic video decoder??? ;-)
I've mainly worked on RF transceivers for cellular, but eventually focused on ADC (analog to digital converters) IP that went into a variety of applications.
Pay depends on a lot of things - experience, type of circuit design, company, geography, etc. I've found that hardware engineer salaries on levels.fyi seem pretty accurate. IEEE also does a salary survey that you can pay to access for really detailed searches. You're definitely looking at starting salaries in 6 figures, and it's competitive with, but still below software engineers.
At small scales, I don't think it's profitable to do your own chip design. Many companies who start are just looking to get acquired rather than really sell their own chips.
Not really familiar with FPGA offerings sorry! It's a growing hobbyist area, though, so I'm sure you can find a lot of information on social media, youtube, etc.
2. Also, is it normal to see circular thickness defects over +-200nm where a wafer vacuum-chuck was obviously set during double-sided polishing? The deformed synthetic sapphire wafers are ruining my fun.
Thanks in advance, =)
That being said, I think the economies are changing. If you don't need a cutting edge process, the tapeout costs continue to come down. The problem that remains, though, is licensing cost of EDA tooling. There is a little bit of competition in that space, but not much. It is growing though, so hopefully that brings prices down.
Your design would in principle have to be an analog design or something that simply cannot take advantage of smaller nodes i.e. MEMS.
I don’t expect a need for high megahertz but would be interested what to expect trade offs to expect as I scale up.
Still, even the open source FPGA tooling is very far behind the commercial software, and there is a reason for hobbyists to use FPGAs. I really hope it improves eventually.
I'm not very hopeful though. My experience of switching from the software industry to the hardware industry has shown me that most hardware people are just really bad at software and also don't really care about it. (Which is kind of weird because hardware design is really just programming for an unusual target platform.)
The fact that Verilator exists and mostly works is a big outlier.
there's no real reason for hobbyists to design a custom IC - anything they can afford to get manufactured could be done on an FPGA.