Cute, but I don't see how it's really "one instruction". It's just encoding the instructions into the "addresses"; like reversing orthogonal addressing, but coming around to the same endpoint. Each address now represents an opcode, so it's not really any more flexible than a "normal" processor architecture.
I find it hard to imagine a human, much less a compiler, could write code for this in any other way that by treating it as a regular register machine, but taking two or three instructions (copy inputs, then copy output) for every one - or else implementing their program in VHDL.
Am I missing something?
