Show HN: Tiny VM sandbox in C with apps in Rust, C and Zig (opens in new tab)

I suppose this is in the same realm as what some people are trying to do with WASM, creating a common execution environment? This is built on RISC-V instead though. I wish I knew more about the limitations/capabilities of each approach, but in any case a future where applications are built for a common VM seems like something we've been building to for a while, the modern web being the closest we've come.

I just had a look at the code and it is indeed very compact. I haven't compiled or used it.

Looks like RISC-V 32-bit integer and multiply and atomic instr extension. Floating point supported when compiling via gcc or similar the example apps (not by the emulator itself but by the compiler emiting the required software functions to emulate the floating point operations instead).

I think it is very clever. Very compact instruction set, with the advantage of being supported by several compilers.

Wrapper over this other project which is the one implementing the instruction set itself: https://github.com/cnlohr/mini-rv32ima

Kudos to both projects.

Really neat clean code!

I like the single C file, but Docker if you want all the examples approach, that's really convenient for embedded.

Test coverage looks good as well, be interesting to see the metrics.

This would be quite cool for adding scripting to medical devices, avoiding the need to revalidate the "core" each time you change a feature.

An interesting comparison would be against an embedded WASM bytecode interpreter like https://github.com/bytecodealliance/wasm-micro-runtime, which is still much larger at 56.3K on a Cortex M4F. Maybe WASM is just a more complicated instruction set than the smallest RISCV profile?

"Just add rats" https://github.com/ringtailsoftware/uvm32/tree/main/apps/zig...

Interesting timing - been looking for exactly this for embedded firmware testing. Most alternatives are either too heavy (full emulation) or too fragile (custom interpreters).

Have you considered adding support for memory-mapped IO simulation? That would make it useful for testing IoT/microcontroller drivers without the actual hardware.